%0 Journal Article
%T Energy efficient IEEE 754 floating point multiplier using dual spacer delay insensitive logic
%A Jyothula, Sudhakar
%A K., Sushma
%J Circuit World
%V 43
%N 2
%P 72-79
%@ 0305-6120
%D 2017-05-02
%I Emerald Group Publishing Limited
%~ DeepDyve